Forward Design Changes Report
-----------------------------

Report File    : H:\ProjPCB\ADAC\FPGA-UNI\FPGA (PCB - Forward Design Changes Report).txt
Report Written : Thursday, May 05, 2011
Project Path   : H:\ProjPCB\ADAC\FPGA-UNI\FPGA.prj
Design Path    : H:\ProjPCB\ADAC\FPGA-UNI\FPGA.pcb
Design Title   : 
Created        : 14.12.2006 11:34:15
Last Saved     : 05.05.2011 08:52:08
Editing Time   : 25848 min
Units          : thou (precision 2)

Disconnected pin "PL1.1" from net "DVgl+".
Disconnected pin "PL1.2" from net "DVgl+".
Disconnected pin "PL1.3" from net "DGnd".
Disconnected pin "PL1.4" from net "DGnd".
Disconnected pin "PL1.5" from net "V++".
Disconnected pin "PL1.6" from net "V++".
Disconnected pin "PL1.7" from net "DGnd".
Disconnected pin "PL1.8" from net "DGnd".
Disconnected pin "PL1.9" from net "V--".
Disconnected pin "PL1.10" from net "V--".
Disconnected pin "PL1.11" from net "DGnd".
Disconnected pin "PL1.12" from net "DGnd".
Disconnected pin "PL1.13" from net "DVcc".
Disconnected pin "PL1.14" from net "DVcc".

Deleted component reference "PL1".

Deleted net class "HiPower".

Connected pin "C17.1" to net "DGnd".


End Of Report.
